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Signal Integrity Analysis and Signal Integrity Simulation

Patents and Products cross reference table
Cross reference table

Silicon Integrity doesn't guarantee System Integrity. Unlike silicon, the integrity of a system is dictated by the IC packages, printed circuit boards and systems level interconnects. As the speed of the off-chip interconnects increases into the gigahertz and gigabits per second range, coupling between the signal line interconnects and power distribution become very critical. This coupling can cause signal degradation, excessive jitter and Electromagnetic Interference.

As the semiconductor industry continually migrates to smaller geometries and as systems become more mixed signal in nature, System on Chip (SoC) solutions are facing major barriers due to both technical and business related reasons. This is leading to the development of alternate technological solutions off-chip such as System in Package (SiP) and System on Package (SoP).

Through 3D integration either by chip stacking using Through Silicon Via (TSV) technology, package stacking (POP) or other means, SiP is offers a more integrated solution than standard SoC.  SoP, which is a technology being pioneered by Georgia Institute of Technology and others, is an extension to SiP where more functions are integrated in the substrate, thereby making the component density match the transistor density on Silicon.   E-System Design announced at 47th DAC a 3D Extraction tool targeted at 3D packaging called Sphinx 3DPF.  See News for more information.

Higher levels of integration are being achieved by merging the package and the board. As multiple signaling domains such as digital, RF and analog functions are merged into a single substrate, and with micro-miniaturization, electromagnetic interference is fast becoming a major bottleneck. This electromagnetic coupling manifests itself as substrate induced noise through the power delivery network, aperture coupling, parasitic coupling through the resistive and inductive nature of the interconnections, coupling through wire bonds and flip chip in 3D stack-ups and through a variety of other coupling mechanisms.

E-System Design provides solutions for analyzing Signal and System Integrity using techniques based on a patent pending method called the Multi-layered Finite Difference Method, it provides a unique solution that is far superior than other methods used for signal and power co-simulation in terms of accuracy and speed.

Sphinx is an electromagnetic solver EDA application that has been developed specifically for signal and power co-simulation.   Through the use of a fast sparse matrix solver, Sphinx provides a solution for fast design closure. The output of Sphinx can be viewed as a Voltage Distribution to visualize hot spots for voltage fluctuations or through Scattering, Impedance or Admittance parameters.

SphinxDC is a DC solver EDA application that has been developed specifically to complement Sphinx.  One common front end GUI for design preparation for both Frequency and DC analysis.  The output of SphinxDC can viewed as a Voltage Distribution to visualize hot spots for voltage fluctuations or create a Spice netlist that can be used with any Spice simulator.

Sphinx 3D Path Finder is an extractor/electromagnetic solver EDA application that has been developed specifically for 3D interconnects.   "3DPF" provides a solution for fast path finding. The output of "3DPF" can be viewed as Touchstone or RLGC files.

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